SHANGHAI, CHINA, MAY 26, 2026 – At the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), He Tingbo of HUAWEI delivered a keynote speech titled “New Semiconductor Path in Practice”, unveiling the Tau (τ) Scaling Law as a new guiding framework for the future evolution of the semiconductor industry. The concept proposes a fundamental shift away from traditional geometric transistor scaling toward a time-based (τ) scaling principle, aimed at improving both semiconductor devices and electronic systems. Through this approach, technologies such as LogicFolding are introduced to reduce signal propagation delays and progressively increase transistor density, supporting continuous improvements in performance and efficiency.
The proposal comes at a time when Moore’s Law, which has driven semiconductor progress for more than five decades, is facing increasing physical and economic limitations. As transistor scaling slows and cost efficiencies diminish, the industry is confronted with the need for a new sustainable path that can meet rapidly growing global computing demands. HUAWEI positions the τ Scaling Law as a response to these challenges, offering a new model for long-term technological advancement.
Built on this principle, HUAWEI has developed core innovations such as LogicFolding and a multi-layer co-optimization strategy that spans devices, circuits, chips, and system architecture. At the device level, improvements focus on reducing resistance and parasitic capacitance to minimize time constants. At the circuit level, LogicFolding restructures traditional layouts to shorten critical paths and reduce signal load, improving both density and performance. At the chip level, integrated software, architecture, and silicon co-design enables more efficient workload handling and lower execution latency. At the system level, technologies such as UnifiedBus are used to reduce communication delays and enable more efficient memory and data management across computing systems.
HUAWEI also highlighted real-world applications of the τ Scaling Law across smartphones and AI computing. According to He Tingbo, the company has already designed and mass-produced 381 chips using this framework over the past six years, supporting multiple industries and use cases. The upcoming Kirin chips, expected in Fall 2026, will be the first to adopt the LogicFolding architecture, promising significant performance gains. Looking further ahead, HUAWEI anticipates that its high-end chips by 2031 could achieve transistor densities comparable to 14 Å (1.4 nm) process levels through continued τ-based design evolution.
In her keynote, He Tingbo also emphasized the importance of openness and collaboration in advancing semiconductor innovation. She noted that no single organization can solve all challenges in the industry alone, and called for deeper global cooperation among scientists, engineers, and industry partners. Through the τ Scaling Law, HUAWEI aims to contribute to a more sustainable and collaborative future for semiconductor and electronic system development.